1. Field of the Invention
In general, the present invention pertains to methods of parallel processing. More specifically, the present invention pertains to methods of pattern recognition including, in particular, methods of pattern recognition for artificial intelligence.
2. Prior Art of the Invention
Prior art pertinent to the present invention includes methods of processing data for pattern recognition. More specifically in the pertinent prior art, conventional computers typically apply hardware and software in a serial process which implements one or more microprocessors and instruction set architecture for pattern recognition. Such methods of pattern recognition disadvantageously limit the performance of the processing of data due to machine cycles which consume fetch and execution times, and consequentially cause a bottleneck. In effect, compute-intensive applications, which include certain pattern recognition applications, perform ineffectively.
The present invention applies a method of pattern recognition that applies an array of interconnected exclusive-nor logic gates which on their own provide a sufficient amount of information for quickly determining the extent to which a pattern of input data matches a pattern of stored data. In result, the method of the present invention compares patterns with a greater performance than the prior art. Then, on a higher level, the present invention provides a high performance method of pattern recognition which is applicable for artificial intelligence.